Arm/cachehit

From ASMBits

Consider the following cache:

  • Direct-mapped (i.e., 1-way set-associative)
  • 2B block size
  • 2S sets

Write a function that will determine whether the cache block for a given address is in a cache (i.e., will hit). Your function will be provided B, S, an array of tags (one for each cache block), and one address.

Assume every cache block in the cache is valid. The array of tags contains exactly 2S words, one for each set. Each entry in the array is a 32-bit word, but only the tag bits are valid (the lower bits that correspond to the set number and offset are undefined).

Your function should return 1 or 0, indicating whether the cache block containing the given address is located in the cache.

int cachehit(unsigned int B, unsigned int S, unsigned int *cachetags, unsigned int addr);

Expected solution length: Around 15 lines.

Sample Input

[See below]

Sample Output

r0=1

Write your solution here

x
 
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.data
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# This direct-mapped cache has 4 sets/blocks. Their tags are 0, 0x100, 0xc0, and 0x40
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# for set 0, 1, 2, and 3, respectively.
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CacheTags:
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.word 0
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.word 0x100
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.word 0xc0
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.word 0x40
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.text
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.global _start
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_start:
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    ldr r0, =4  // Cache has 2^4 byte blocks
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    ldr r1, =2  // Cache has 2^2 sets
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    ldr r2, =CacheTags
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    ldr r3, =0x110  // Is 0x110 in the cache?
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    bl cachehit
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1:  b 1b    // Done
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cachehit:
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